Josef Schmid, Joachim Knäblein. Advanced Synchronous Scan Test Methodology for Multi Clock Domain ASICs. In 17th IEEE VLSI Test Symposium (VTS 99), 25-30 April 1999, San Diego, CA, USA. pages 106-113, IEEE Computer Society, 1999. [doi]
@inproceedings{SchmidK99,
title = {Advanced Synchronous Scan Test Methodology for Multi Clock Domain ASICs},
author = {Josef Schmid and Joachim Knäblein},
year = {1999},
url = {http://csdl.computer.org/comp/proceedings/vts/1999/0146/00/01460106abs.htm},
tags = {testing},
researchr = {https://researchr.org/publication/SchmidK99},
cites = {0},
citedby = {0},
pages = {106-113},
booktitle = {17th IEEE VLSI Test Symposium (VTS 99), 25-30 April 1999, San Diego, CA, USA},
publisher = {IEEE Computer Society},
isbn = {0-7695-0146-X},
}