Johannes Schoder, H. Martin Bücker. Scaling an Augmented RISC-V Processor Design with High-Level Synthesis. In Michèle Weiland, Sarah Neuwirth, Carola Kruse, Tobias Weinzierl, editors, High Performance Computing. ISC High Performance 2024 International Workshops - Hamburg, Germany, May 12-16, 2024, Revised Selected Papers. Volume 15058 of Lecture Notes in Computer Science, pages 312-324, Springer, 2024. [doi]
@inproceedings{SchoderB24,
title = {Scaling an Augmented RISC-V Processor Design with High-Level Synthesis},
author = {Johannes Schoder and H. Martin Bücker},
year = {2024},
doi = {10.1007/978-3-031-73716-9_22},
url = {https://doi.org/10.1007/978-3-031-73716-9_22},
researchr = {https://researchr.org/publication/SchoderB24},
cites = {0},
citedby = {0},
pages = {312-324},
booktitle = {High Performance Computing. ISC High Performance 2024 International Workshops - Hamburg, Germany, May 12-16, 2024, Revised Selected Papers},
editor = {Michèle Weiland and Sarah Neuwirth and Carola Kruse and Tobias Weinzierl},
volume = {15058},
series = {Lecture Notes in Computer Science},
publisher = {Springer},
isbn = {978-3-031-73716-9},
}