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Scaling an Augmented RISC-V Processor Design with High-Level Synthesis

Johannes Schoder, H. Martin Bücker. Scaling an Augmented RISC-V Processor Design with High-Level Synthesis. In Michèle Weiland, Sarah Neuwirth, Carola Kruse, Tobias Weinzierl, editors, High Performance Computing. ISC High Performance 2024 International Workshops - Hamburg, Germany, May 12-16, 2024, Revised Selected Papers. Volume 15058 of Lecture Notes in Computer Science, pages 312-324, Springer, 2024. [doi]

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