A Time-Predictable Memory Network-on-Chip

Martin Schoeberl, David Vh Chong, Wolfgang Puffitsch, Jens Sparsø. A Time-Predictable Memory Network-on-Chip. In Heiko Falk, editor, 14th International Workshop on Worst-Case Execution Time Analysis, WCET 2014, July 8, 2014, Ulm, Germany. Volume 39 of OASICS, pages 53-62, Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, 2014. [doi]

@inproceedings{SchoeberlCPS14,
  title = {A Time-Predictable Memory Network-on-Chip},
  author = {Martin Schoeberl and David Vh Chong and Wolfgang Puffitsch and Jens Sparsø},
  year = {2014},
  doi = {10.4230/OASIcs.WCET.2014.53},
  url = {http://dx.doi.org/10.4230/OASIcs.WCET.2014.53},
  researchr = {https://researchr.org/publication/SchoeberlCPS14},
  cites = {0},
  citedby = {0},
  pages = {53-62},
  booktitle = {14th International Workshop on Worst-Case Execution Time Analysis, WCET 2014, July 8, 2014, Ulm, Germany},
  editor = {Heiko Falk},
  volume = {39},
  series = {OASICS},
  publisher = {Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik},
  isbn = {978-3-939897-69-9},
}