Latency-Optimized Force-directed Process Mapping for MPSoC Architectures - researchr publication authors

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Timo Schönwald, Benjamin Ranft, Oliver Bringmann, Wolfgang Rosenstiel. Latency-Optimized Force-directed Process Mapping for MPSoC Architectures. In Jens Brandt, Klaus Schneider, editors, Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Kaiserslautern, Germany, March 5-7, 2012. pages 145-156, Verlag Dr. Kovac, 2012.

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