Leakage Reduction at the Architectural Level and Its Application to 16 Bit Multiplier Architectures

Christian Schuster, Jean-Luc Nagel, Christian Piguet, Pierre-André Farine. Leakage Reduction at the Architectural Level and Its Application to 16 Bit Multiplier Architectures. In Enrico Macii, Odysseas G. Koufopavlou, Vassilis Paliouras, editors, Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings. Volume 3254 of Lecture Notes in Computer Science, pages 169-178, Springer, 2004. [doi]

Abstract

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