Low-Voltage Low-Power Highly Linear Down-Sampling Mixer in 65nm Digital CMOS Technology

Kurt Schweiger, Horst Zimmermann. Low-Voltage Low-Power Highly Linear Down-Sampling Mixer in 65nm Digital CMOS Technology. In Bernd Straube, Milos Drutarovský, Michel Renovell, Peter Gramata, Mária Fischerová, editors, Proceedings of the 11th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2008), Bratislava, Slovakia, April 16-18, 2008. pages 174-177, IEEE Computer Society, 2008. [doi]

Abstract

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