N. Pete Sedcole, Justin S. Wong, Peter Y. K. Cheung. Characterisation of FPGA Clock Variability. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2008, 7-9 April 2008, Montpellier, France. pages 322-328, IEEE Computer Society, 2008. [doi]
@inproceedings{SedcoleWC08,
title = {Characterisation of FPGA Clock Variability},
author = {N. Pete Sedcole and Justin S. Wong and Peter Y. K. Cheung},
year = {2008},
doi = {10.1109/ISVLSI.2008.48},
url = {http://dx.doi.org/10.1109/ISVLSI.2008.48},
researchr = {https://researchr.org/publication/SedcoleWC08},
cites = {0},
citedby = {0},
pages = {322-328},
booktitle = {IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2008, 7-9 April 2008, Montpellier, France},
publisher = {IEEE Computer Society},
}