Scheduling Tests for 3D Stacked Chips under Power Constraints

Breeta SenGupta, Urban Ingelsson, Erik Larsson. Scheduling Tests for 3D Stacked Chips under Power Constraints. In Sixth IEEE International Symposium on Electronic Design, Test and Application, DELTA 2011, Queenstown, New Zealand, 17-19 January, 2011. pages 72-77, IEEE, 2011. [doi]

Abstract

Abstract is missing.