User power-delay budget driven PSO based design space exploration of optimal k-cycle transient fault secured datapath during high level synthesis

Anirban Sengupta, Saumya Bhadauria. User power-delay budget driven PSO based design space exploration of optimal k-cycle transient fault secured datapath during high level synthesis. In Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015. pages 289-292, IEEE, 2015. [doi]

@inproceedings{SenguptaB15-1,
  title = {User power-delay budget driven PSO based design space exploration of optimal k-cycle transient fault secured datapath during high level synthesis},
  author = {Anirban Sengupta and Saumya Bhadauria},
  year = {2015},
  doi = {10.1109/ISQED.2015.7085441},
  url = {http://dx.doi.org/10.1109/ISQED.2015.7085441},
  researchr = {https://researchr.org/publication/SenguptaB15-1},
  cites = {0},
  citedby = {0},
  pages = {289-292},
  booktitle = {Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-7581-5},
}