Power-Delay Metrics Revisited for 90nm CMOS Technology - researchr publication authors

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Dipanjan Sengupta, Resve A. Saleh. Power-Delay Metrics Revisited for 90nm CMOS Technology. In 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA. pages 291-296, IEEE Computer Society, 2005. [doi]

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