Dipanjan Sengupta, Resve A. Saleh. Power-Delay Metrics Revisited for 90nm CMOS Technology. In 6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA. pages 291-296, IEEE Computer Society, 2005. [doi]
@inproceedings{SenguptaS05,
title = {Power-Delay Metrics Revisited for 90nm CMOS Technology},
author = {Dipanjan Sengupta and Resve A. Saleh},
year = {2005},
doi = {10.1109/ISQED.2005.98},
url = {http://doi.ieeecomputersociety.org/10.1109/ISQED.2005.98},
researchr = {https://researchr.org/publication/SenguptaS05},
cites = {0},
citedby = {0},
pages = {291-296},
booktitle = {6th International Symposium on Quality of Electronic Design (ISQED 2005), 21-23 March 2005, San Jose, CA, USA},
publisher = {IEEE Computer Society},
isbn = {0-7695-2301-3},
}