Low-jitter, plain vanilla CMOS CDR with half-rate linear PD and half rate frequency detector

Solomon Serunjogi, Kai-Wei Lin, Mahmoud Rasras, Mihai Sanduleanu. Low-jitter, plain vanilla CMOS CDR with half-rate linear PD and half rate frequency detector. In 2017 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017. pages 1-6, IEEE, 2017. [doi]

Abstract

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