Alireza Shafaei, Massoud Pedram. Energy-efficient cache memories using a dual-Vt 4T SRAM cell with read-assist techniques. In Luca Fanucci, Jürgen Teich, editors, 2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016, Dresden, Germany, March 14-18, 2016. pages 457-462, IEEE, 2016. [doi]
@inproceedings{ShafaeiP16,
title = {Energy-efficient cache memories using a dual-Vt 4T SRAM cell with read-assist techniques},
author = {Alireza Shafaei and Massoud Pedram},
year = {2016},
url = {http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?arnumber=7459354},
researchr = {https://researchr.org/publication/ShafaeiP16},
cites = {0},
citedby = {0},
pages = {457-462},
booktitle = {2016 Design, Automation & Test in Europe Conference & Exhibition, DATE 2016, Dresden, Germany, March 14-18, 2016},
editor = {Luca Fanucci and Jürgen Teich},
publisher = {IEEE},
isbn = {978-3-9815-3707-9},
}