Aarti Shah, Bibhu Datta. An 8b 5-GS/s CMOS SAR ADC with speed optimized SAR logic. In IEEE 60th International Midwest Symposium on Circuits and Systems, MWSCAS 2017, Boston, MA, USA, August 6-9, 2017. pages 1465-1468, IEEE, 2017. [doi]
Abstract is missing.