M. Shahdad. An Interface between VHDL and EDIF. In DAC. pages 472-478, 1987. [doi]
@inproceedings{Shahdad87, title = {An Interface between VHDL and EDIF}, author = {M. Shahdad}, year = {1987}, doi = {10.1145/37888.37958}, url = {http://doi.acm.org/10.1145/37888.37958}, researchr = {https://researchr.org/publication/Shahdad87}, cites = {0}, citedby = {0}, pages = {472-478}, booktitle = {DAC}, }