Time-area efficient multiplier-free filter architectures for FPGA implementation - researchr publication authors

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Mohammad Shajaan, Karsten Nielsen, John Aasted Sørensen. Time-area efficient multiplier-free filter architectures for FPGA implementation. In 1995 International Conference on Acoustics, Speech, and Signal Processing, ICASSP '95, Detroit, Michigan, USA, May 08-12, 1995. pages 3251-3254, IEEE Computer Society, 1995. [doi]

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