Thread-level parallelization and optimization of NWChem for the Intel MIC architecture - researchr publication authors

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Hongzhang Shan, Samuel Williams, Wibe De Jong, Leonid Oliker. Thread-level parallelization and optimization of NWChem for the Intel MIC architecture. In Pavan Balaji, Minyi Guo, Zhiyi Huang 0001, editors, Proceedings of the Sixth International Workshop on Programming Models and Applications for Multicores and Manycores, PMAM@PPoPP 2015, San Francisco, CA, USA, February 7-8, 2015. pages 58-67, ACM, 2015. [doi]

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