Thread-level parallelization and optimization of NWChem for the Intel MIC architecture

Hongzhang Shan, Samuel Williams, Wibe De Jong, Leonid Oliker. Thread-level parallelization and optimization of NWChem for the Intel MIC architecture. In Pavan Balaji, Minyi Guo, Zhiyi Huang 0001, editors, Proceedings of the Sixth International Workshop on Programming Models and Applications for Multicores and Manycores, PMAM@PPoPP 2015, San Francisco, CA, USA, February 7-8, 2015. pages 58-67, ACM, 2015. [doi]

@inproceedings{ShanWJO15,
  title = {Thread-level parallelization and optimization of NWChem for the Intel MIC architecture},
  author = {Hongzhang Shan and Samuel Williams and Wibe De Jong and Leonid Oliker},
  year = {2015},
  doi = {10.1145/2712386.2712391},
  url = {http://doi.acm.org/10.1145/2712386.2712391},
  researchr = {https://researchr.org/publication/ShanWJO15},
  cites = {0},
  citedby = {0},
  pages = {58-67},
  booktitle = {Proceedings of the Sixth International Workshop on Programming Models and Applications for Multicores and Manycores, PMAM@PPoPP 2015, San Francisco, CA, USA, February 7-8, 2015},
  editor = {Pavan Balaji and Minyi Guo and Zhiyi Huang 0001},
  publisher = {ACM},
  isbn = {978-1-4503-3404-4},
}