Accurate Prediction of Substrate Parasitics in Heavily Doped CMOS Processes Using a Calibrated Boundary Element Solver

Ajit Sharma, P. Birrer, S. K. Arunachalam, Chenggang Xu, Terri S. Fiez, Kartikeya Mayaram. Accurate Prediction of Substrate Parasitics in Heavily Doped CMOS Processes Using a Calibrated Boundary Element Solver. IEEE Trans. VLSI Syst., 13(7):843-851, 2005. [doi]

Authors

Ajit Sharma

This author has not been identified. Look up 'Ajit Sharma' in Google

P. Birrer

This author has not been identified. Look up 'P. Birrer' in Google

S. K. Arunachalam

This author has not been identified. Look up 'S. K. Arunachalam' in Google

Chenggang Xu

This author has not been identified. Look up 'Chenggang Xu' in Google

Terri S. Fiez

This author has not been identified. Look up 'Terri S. Fiez' in Google

Kartikeya Mayaram

This author has not been identified. Look up 'Kartikeya Mayaram' in Google