DELSIC: A Delay Simulator for Interconnect Circuits

Rohit Sharma, Nitin Chanderwal, Vivek Kumar Sehgal, Amit Kumar, Preity Gupta, Ashish Nandan Lal. DELSIC: A Delay Simulator for Interconnect Circuits. In Hamid R. Arabnia, Ashu M. G. Solo, editors, Proceedings of the 2009 International Conference on Computer Design, CDES 2009, July 13-16, 2009, Las Vegas Nevada, USA. pages 52-56, CSREA Press, 2009.

Abstract

Abstract is missing.