Design and FPGA implementation of block synchronizer for Viterbi decoder

Satish Sharma, Sunil Kulkarni, H. S. Vasudevamurthy, N. Valarmathi. Design and FPGA implementation of block synchronizer for Viterbi decoder. In International Conference on Advances in Computing, Communications and Informatics, ICACCI 2013, Mysore, India, August 22-25, 2013. pages 908-912, IEEE, 2013. [doi]

Authors

Satish Sharma

This author has not been identified. Look up 'Satish Sharma' in Google

Sunil Kulkarni

This author has not been identified. Look up 'Sunil Kulkarni' in Google

H. S. Vasudevamurthy

This author has not been identified. Look up 'H. S. Vasudevamurthy' in Google

N. Valarmathi

This author has not been identified. Look up 'N. Valarmathi' in Google