SEU tolerant robust memory cell design

Mohammed Shayan, Virendra Singh, Adit D. Singh, Masahiro Fujita. SEU tolerant robust memory cell design. In 18th IEEE International On-Line Testing Symposium, IOLTS 2012, Sitges, Spain, June 27-29, 2012. pages 13-18, IEEE Computer Society, 2012. [doi]

@inproceedings{ShayanSSF12-0,
  title = {SEU tolerant robust memory cell design},
  author = {Mohammed Shayan and Virendra Singh and Adit D. Singh and Masahiro Fujita},
  year = {2012},
  doi = {10.1109/IOLTS.2012.6313834},
  url = {http://doi.ieeecomputersociety.org/10.1109/IOLTS.2012.6313834},
  researchr = {https://researchr.org/publication/ShayanSSF12-0},
  cites = {0},
  citedby = {0},
  pages = {13-18},
  booktitle = {18th IEEE International On-Line Testing Symposium, IOLTS 2012, Sitges, Spain, June 27-29, 2012},
  publisher = {IEEE Computer Society},
  isbn = {978-1-4673-2082-5},
}