Rupesh S. Shelar. An Algorithm for Delay Optimal Logic Replication for FPGAs Accounting for Combinational Loops. In Stephen Neuendorffer, Lesley Shannon, editors, FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020. pages 323, ACM, 2020. [doi]
@inproceedings{Shelar20, title = {An Algorithm for Delay Optimal Logic Replication for FPGAs Accounting for Combinational Loops}, author = {Rupesh S. Shelar}, year = {2020}, doi = {10.1145/3373087.3375356}, url = {https://doi.org/10.1145/3373087.3375356}, researchr = {https://researchr.org/publication/Shelar20}, cites = {0}, citedby = {0}, pages = {323}, booktitle = {FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Seaside, CA, USA, February 23-25, 2020}, editor = {Stephen Neuendorffer and Lesley Shannon}, publisher = {ACM}, isbn = {978-1-4503-7099-8}, }