Multi-Valued Logic Pass Gate Network Using Neuron-MOS Transistors

Jing Shen, Motoi Inaba, Koichi Tanno, Okihiko Ishizuka. Multi-Valued Logic Pass Gate Network Using Neuron-MOS Transistors. In ISMVL. pages 15-20, 2000. [doi]

@inproceedings{ShenITI00,
  title = {Multi-Valued Logic Pass Gate Network Using Neuron-MOS Transistors},
  author = {Jing Shen and Motoi Inaba and Koichi Tanno and Okihiko Ishizuka},
  year = {2000},
  url = {http://computer.org/proceedings/ismvl/0692/06920015abs.htm},
  tags = {logic},
  researchr = {https://researchr.org/publication/ShenITI00},
  cites = {0},
  citedby = {0},
  pages = {15-20},
  booktitle = {ISMVL},
}