Parallelizing FPGA Technology Mapping through Partitioning

Chuyu Shen, Zili Lin, Ping Fan, Xianglong Meng, Weikang Qian. Parallelizing FPGA Technology Mapping through Partitioning. In 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016, Washington, DC, USA, May 1-3, 2016. pages 164-167, IEEE, 2016. [doi]

@inproceedings{ShenLFMQ16,
  title = {Parallelizing FPGA Technology Mapping through Partitioning},
  author = {Chuyu Shen and Zili Lin and Ping Fan and Xianglong Meng and Weikang Qian},
  year = {2016},
  doi = {10.1109/FCCM.2016.48},
  url = {http://doi.ieeecomputersociety.org/10.1109/FCCM.2016.48},
  researchr = {https://researchr.org/publication/ShenLFMQ16},
  cites = {0},
  citedby = {0},
  pages = {164-167},
  booktitle = {24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, FCCM 2016, Washington, DC, USA, May 1-3, 2016},
  publisher = {IEEE},
  isbn = {978-1-5090-2356-1},
}