RIFL: A Reliable Link Layer Network Protocol for FPGA-to-FPGA Communication

Qianfeng Clark Shen, Jun Zheng, Paul Chow. RIFL: A Reliable Link Layer Network Protocol for FPGA-to-FPGA Communication. In Lesley Shannon, Michael Adler, editors, FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28 - March 2, 2021. pages 148, ACM, 2021. [doi]

@inproceedings{ShenZC21,
  title = {RIFL: A Reliable Link Layer Network Protocol for FPGA-to-FPGA Communication},
  author = {Qianfeng Clark Shen and Jun Zheng and Paul Chow},
  year = {2021},
  doi = {10.1145/3431920.3439467},
  url = {https://doi.org/10.1145/3431920.3439467},
  researchr = {https://researchr.org/publication/ShenZC21},
  cites = {0},
  citedby = {0},
  pages = {148},
  booktitle = {FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28 - March 2, 2021},
  editor = {Lesley Shannon and Michael Adler},
  publisher = {ACM},
  isbn = {978-1-4503-8218-2},
}