Correcting ADC jitter using DPLL timing error signal - researchr publication related

researchr

You are not signed in
Sign in
Sign up

Haoyang Shen, Hao Zheng, Daniel O'Hare, Deepu John, Barry Cardiff. Correcting ADC jitter using DPLL timing error signal. In 21st IEEE Interregional NEWCAS Conference, NEWCAS 2023, Edinburgh, United Kingdom, June 26-28, 2023. pages 1-5, IEEE, 2023. [doi]

The following publications are possibly variants of this publication:

Mixed signal compensation of sampling errors in ADCs due to noisy DPLL clock sourcesHao Zheng, Eric Thompson, John Hogan, Daniel O'Hare. newcas 2021: 1-4 [doi]

runs on WebDSL