Table of Contents

• Sensor node design and evaluation for quality assurance of drugsMaria Frontera-Bergas, Bartomeu Oliver-Riera, Josep Genovard-Oliver, Miguel Vinaixa-Fernández, Eugeni M. Isern-Riutort, Jaume Ramis-Bibiloni, Miquel J. Roca-Adrover, Bartomeu Alorda-Ladaria. 1-2 [doi]
• Sensitivity Analysis of Memory Bandwidth on Column-superposed Versatile Linear CGRATomoya Akabe, Ryotaro Funai, Yasuhiko Nakashima. 1-5 [doi]
• Highly Integrated and Ultra-Compact Rectenna with Wireless Powering for Implantable Vascular DevicesJungang Zhang, Mahmoud Wagih, Daniel Hoare, Nosrat Mirzai, John R. Mercer, Rupam Das, Hadi Heidari. 1-5 [doi]
• Low-Energy, Scalable, On-demand State-of-charge Estimation System for Li-ion batteriesDufour Jules, Yvon Savaria, Jean-Pierre David. 1-5 [doi]
• Integrated Architecture for Neural Networks and Security Primitives using RRAM CrossbarSimranjeet Singh, Furqan Zahoor, Gokulnath Rajendran, Vikas Rana, Sachin B. Patkar, Anupam Chattopadhyay, Farhad Merchant. 1-5 [doi]
• A Memristor-based Tuneable Offset ComparatorSachin Maheshwari, Jiaqi Wang, Alexander Serb, Themistoklis Prodromakis. 1-5 [doi]
• An Ultra-Wideband Amplifier With Compact Magnetically Coupled Feedback Gain CellWeiping Wu, Shi Chen, Xun Bao, Lei Zhang, Yan Wang. 1-4 [doi]
• A Low-Voltage Submicrowatt, High-Speed CMOS Dynamic ComparatorFatemeh Shakibaee, Benoit Gosselin. 1-5 [doi]
• An Ultra-Compact Calculation Unit with Temporal-Spatial Re-configurabilityGuangxian Zhu, Yirong Kan, Renyuan Zhang, Yasuhiko Nakashima. 1-5 [doi]
• Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array ConfigurationsDaniel Reiser, Marc Reichenbach, Tommaso Rizzi, Andrea Baroni, Markus Fritscher, Christian Wenger, Cristian Zambelli, Davide Bertozzi. 1-5 [doi]
• Portable Diagnostic Platform for Rapid Detection of 2µL Paramagnetic Particles in 5sYuanxi Cheng, Siming Zuo, Lisa Ranford-Cartwright, Nosrat Mirzai, Hadi Heidari. 1-4 [doi]
• A 2.45GHz SiGe Power Amplifier with a Novel Digital Predistortion using Orthogonal SequencesAntoine Lhomel, Maxandre Fellmann, Rémi Quéheille, Yann Deval, Eric Kerhervé, François Rivet, Nathalie Deltimple. 1-5 [doi]
• Statistical Model Checking based Analysis of Fault Trees and Power Consumption to Enhance Autonomous Systems ReliabilityAshkan Samadi, Marwan Ammar, Otmane Aït Mohamed. 1-5 [doi]
• On the Synthesis of Lossy Analog Filter Networks With Lossless-Like Passband ShapeRoberto Gómez-García, José-María Muñoz-Ferreras, Li Yang, Xi Zhu. 1-5 [doi]
• Performance and Stability Characterization of a 3rd Order Continuous-Time Delta-Sigma Modulator with Active Time-Constant TuningTobias Wolfer, Eckhard Hennig. 1-4 [doi]
• A Low Power Ultra-Wideband RF Receiver Front-End using a Differential N-Path Notch FilterAli Poursaadati Zinjanab, Nakisa Shams, Frederic Nabki. 1-4 [doi]
• Analog Baseband Circuits for Low-power 802-11ba Wake-up Radio in 40-nm CMOSAndrea Boni, Michele Caselli, Francesco Frattini, Francesco Malena, Marco Ronchi. 1-5 [doi]
• Sparq: A Custom RISC-V Vector Processor for Efficient Sub-Byte Quantized InferenceThéo Dupuis, Yoan Fournier, MohammadHossein AskariHemmat, Nizar El Zarif, François Leduc-Primeau, Jean-Pierre David, Yvon Savaria. 1-5 [doi]
• Anomaly Behaviour tracing of CHERI-RISC V using Hardware-Software Co-designMichal Borowski, Chandrajit Pal, Sangeet Saha, Ludovico Poli, Xiaojun Zhai, Klaus D. McDonald-Maier. 1-5 [doi]
• Fully Parallel, Flexible, and Conflict-Free Interleaver Design using Processing in MemoryMojtaba Mahdavi. 1-2 [doi]
• An Asynchronous Single-Inductor Multi-Input Multi-Output DC-DC Converter for Ambient Energy Harvesting with 94.8% Peak EfficiencyHongjian Tan, Zhuo Gao, Guo Li, Ruiliang Song, Hao Wei, Mingyi Chen. 1-5 [doi]
• Design and modeling of heterogeneous semi-active wake-up radio for sensor network applicationsRuochen Ding, William Tatinian. 1-4 [doi]
• A New Current-Mode Subthreshold, High-PSRR MOSFET-Only Bandgap Voltage ReferenceReza Papi, Fereidoon Hashemi Noshahr, Benoit Gosselin. 1-5 [doi]
• Localization of Miniature Ingestible coils using Tri-Polar Plane Type (TPT) TransmitterLichen Yao, Sadeque Reza Khan, Guido Dolmans, Jac Romme, Srinjoy Mitra. 1-5 [doi]
• A Deep Reinforcement Learning-based Routing Algorithm for Unknown Erroneous Cells in DMFBsTomohisa Kawakami, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita. 1-5 [doi]
• Streaming Convolutional Neural Network FPGA Architecture for RFSoC Data ConvertersAndrew Maclellan, Louise H. Crockett, Robert W. Stewart. 1-5 [doi]
• Iterative pruning algorithm for efficient look-up table implementation of binary neural networksAmirali Ebrahimi, Vineeth Narayan Pullu, J. M. Pierre Langlois, Jean-Pierre David. 1-5 [doi]
• Automated Information Flow Analysis for Integrated Computing-in-Memory ModulesLennart M. Reimann, Felix Staudigl, Rainer Leupers. 1-5 [doi]
• A 10-bit 10 MS/s SAR ADC with Duty-Cycled Multiple Feedback FilterHanyue Li, Yuting Shen, Eugenio Cantatore, Pieter Harpe. 1-5 [doi]
• SqueezeNetVLAD: High-speed power and memory efficient GPS less accurate network model for visual place recognition on the edgeChandrajit Pal, Pratibha Verma, Himanshu Rohit, Dubacharla Gyaneshwar, Sumohana S. Channappayya, Amit Acharyya. 1-5 [doi]
• A 1,224-Channel 60 μm Pitch Active Closed-Loop Stimulator for Selective Retinal Ganglion Cell Type ActivationPhilipp Löhler, Andreas Pickhinke, Andreas Erbslöh, Karsten Seidl. 1-4 [doi]
• Improved Dynamic Comparator With Adaptive Delay Line for the Latch Conduction and Regenerative Feedback Assisted FIAFeng Tai, Qiang Li. 1-5 [doi]
• Decentralised Biomedical Signal Classification using Early ExitsLi Xiaolin, Hans Vandierendonck, Dimitrios S. Nikolopoulos, Bo Jin 0001, Barry Cardiff, Deepu John. 1-2 [doi]
• Optimum Supply Voltage for High Gain Amplifier in Telemetry Circuitry for Ultra-Low Power Implantable Cardiac PacemakerManisha G, Amit Krishna Dwivedi, Uma Maheshwari V, Prasun Chakrabarti, Martin Margala. 1-5 [doi]
• A Simplified Hindmarsh-Rose Model Based on Power-Flow AnalysisSebastian Jenderny, Karlheinz Ochs, Matthew Gibson, Philipp Hövel. 1-5 [doi]
• Modular Processor Architecture with Cryptography ISA ExtensionsOren Ganon, Itamar Levi. 1-2 [doi]
• Broadband RF Front-End Featuring a Reconfigurable Q-Enhanced Filter for Upper Mid-Band 6G ReceiversIman Ghotbi, Baktash Behmanesh, Markus Törmänen. 1-5 [doi]
• A 10Bit 6 GS/s Time-Interleaved SAR ADC with a Single Full-Rate Front-End Track-and-HoldSebastian Linnhoff, Frowin Buballa, Julius Edler, Enne Wittenhagen, Urs Hecht, Friedel Gerfers. 1-5 [doi]
• Design and Experimental Evaluation of 60 GHz Self-compensating Bond-wire InterconnectRabia Fatima Riaz, Florian Protze, Christian Hoyer, Jens Wagner, Frank Ellinger. 1-5 [doi]
• A Spur-free Dynamic Element Matching Scheme for Bandpass DACsJarrah Bergeron, Sudhakar Pamarti. 1-5 [doi]
• Formal Analysis of Camouflaged Reconfigurable CircuitsSteffen Märcker, Michael Raitza, Shubham Rai, Giulio Galderisi, Thomas Mikolajick, Jens Trommer, Akash Kumar 0001. 1-5 [doi]
• A Shared Synapse Architecture for All-Optical Spiking Neural NetworksMilad Eslaminia, Sébastien Le Beux. 1-5 [doi]
• Fully Time-Based PID Controller for a High Frequency Buck ConverterNicolai J. Dahl, Pere Llimós Muntal, Michael A. E. Andersen. 1-5 [doi]
• A Necessary and Sufficient Condition to Generate Representative Clip for Edge-Constrained Clustering of Layout Pattern Classification ProblemKunihiro Fujiyoshi, Tomoya Masutani. 1-4 [doi]
• American Sign Language Recognition System Using Wearable Sensors and Machine LearningModou Dibba, Cheol-Hong Min. 1-5 [doi]
• A High-Speed Charge-Injection based Double Tail Latch for Decision Feedback Equalizer (DFE)Suraj Kumar Prusty, V. K. Surya, Nijwm Wary. 1-5 [doi]
• Modelling and Analysis of FPGA-based MPSoC System with Multiple DNN AcceleratorsCong Gao, Xuqi Zhu, Sangeet Saha, Klaus D. McDonald-Maier, Xiaojun Zhai. 1-5 [doi]
• Heterogeneity in Time Delays between Mutually Synchronized 24 GHz OscillatorsChristian Hoyer, Lucas Wetzel, Dimitrios A. Prousalis, Jens Wagner, Frank Jülicher, Frank Ellinger. 1-5 [doi]
• A Multi-Modal Stimulator System for Visual ProsthesisEmad A. Abdo, Peimin Yuan, Yujin Zheng, Alex Yakovlev, Patrick Degenaar. 1-5 [doi]
• Memristive Crossbar for Hyper Dimensional Consumer Text Analytics AcceleratorPv Mohammad Navaz, R. Chithra, Alex James 0001. 1-5 [doi]
• A Modular System-level Testbench for 6G Beamforming Applications with Near Circuit-Level FidelityRikard Gannedahl, Javad Bagheri Asli, Henrik Sjöland, Atila Alvandpour. 1-5 [doi]
• Efficiency and Sustainability in Simulation: Enhancing Accuracy of Chaotic Maps Using Kahan SummationThalita E. Nazaré, Samir A. M. Martins, Erivelton Geraldo Nepomuceno. 1-5 [doi]
• RFSoC Implementation of Runtime Reconfigurable Numerologies for 5G New RadioLewis J. Brown, Louise H. Crockett, Robert W. Stewart. 1-2 [doi]
• Adaptive FOCV MPPT for Piezoelectric Energy Harvesting CircuitLakhdar Mamouri, Vincent Frick. 1-5 [doi]
• An Autonomous Zero-Mask Unique ID Generation System for Next-Generation Neural InterfacesBerkay Özbek, Timothy G. Constandinou. 1-5 [doi]
• Doherty Power Amplifier with Compact Load Modulation Network for 5G ApplicationsPraveen Saraswat, Mahima Arrawatia. 1-5 [doi]
• Gated Ring Oscillator Time Amplifier with Applications in Time IntegrationFei Yuan. 1-5 [doi]
• Multi-context-scrubbing operation for a 1-bit counter circuitKakeru Ando, Minoru Watanabe, Nobuya Watanabe. 1-4 [doi]
• Overview of Memristive CryptographyIlia Polian, Nan Du, Werner Schindler. 1-5 [doi]
• Random and Static Phase Errors in a PLL Array for Millimeter-Wave Frequency GenerationFrank Herzel, Corrado Carta, Gunter Fischer. 1-5 [doi]
• A sub-picosecond resolution jitter instrument for GHz frequencies based on a sub-sampling TDAAnkush Mamgain, Manasa Madhvaraj, Salvador Mir, Manuel J. Barragán, Jai Narayan Tripathi. 1-5 [doi]
• Improving Pin Accessibility of Standard Cells under Power/Ground StripesPei-Sheng Lu, Rung-Bin Lin. 1-5 [doi]
• An Integrated Analog Lock-In Amplifier using a Passive 3-Path Band-Pass Filter for a Fluxgate Sensor Readout CircuitMaximilian Scherzer, Mario Auer, Werner Magnes. 1-4 [doi]
• Optoelectronic Memristor Model for Optical Synaptic Circuit of Spiking Neural NetworksJiawei Xu 0002, Yi Zheng, Chenxu Sheng, Yichen Cai, Dimitrios Stathis 0001, Ruisi Shen, Lirong Zheng 0001, Zhuo Zou, Laigui Hu, Ahmed Hemani. 1-5 [doi]
• A Novel Dynamic Memristor Window Function for High Frequency ApplicationsAnanda Y. R., Subhashis Das, Gaurav Trivedi. 1-5 [doi]
• Bent-Pyramid: Towards A Quasi-Stochastic Data Representation for AI HardwareShady Agwa, Themis Prodromakis. 1-5 [doi]
• Leakage Power Attack and Half Select Issue Resilient Split 8T SRAM CellSyed Farah Naz, Mansi Chawla, Ambika Prasad Shah. 1-2 [doi]
• Variable Duty Cycle Pulse Generation for Low Complexity Randomization in Machine LearningKomal Krishnamurthy, Omar Ghazal, Tian Lan, Fei Xia, Alex Yakovlev, Rishad A. Shafik. 1-5 [doi]
• Benchmarking Multiplier Architectures for MAGIC Based In-Memory ComputingChandan Kumar Jha 0001, Rolf Drechsler. 1-5 [doi]
• Towards a CMOS-Process-Portable ReRAM PDKAndrea Mifsud, Timothy G. Constandinou. 1-5 [doi]
• Toward a Polysilicon-Based Electrostatically Actuated DC MEMS SwitchAbdurrashid Hassan Shuaibu, Yves Blaquière, Frédéric Nabki. 1-4 [doi]
• Single Transistor Analog Building Blocks: Exploiting Back-Bias Reconfigurable DevicesN. Bhattacharjee, Maximilian Reuter, Klaus Hofmann, Thomas Mikolajick, Jens Trommer. 1-5 [doi]
• A Single-Turn Inductor based Compact and Wide-Tuning LC-VCO using Dual-Resonant ModesRitesh Sachdeva, Abhishek Kumar. 1-5 [doi]
• A V-Band Compact LNA With Gm-Boosting and Noise-Cancelling TechniqueJingze Wang, Shulan Chen, Lei Zhang, Yan Wang. 1-5 [doi]
• A Beam Steerable Speaker Tracking-based First-order Differential Microphone ArrayAli Sarafnia, M. Omair Ahmad, M. N. S. Swamy. 1-5 [doi]
• A Time-Domain Charge-Balancing Method for NeuromodulatorsStefan Reich, Markus Sporer, Maurits Ortmanns. 1-5 [doi]
• Error Resilient Sleep Convention Logic Asynchronous Circuit DesignMithun Datta, Alexander C. Bodoh, Ashiq A. Sakib. 1-5 [doi]
• Wave Digital Emulation of a Light-Modulated Central Pattern GeneratorSebastian Jenderny, Karlheinz Ochs, Oways Alsoloh. 1-4 [doi]
• An Energy-Efficient Design Strategy for Dickson Charge Pumps with Linear Distributed CapacitanceAndrea Ballo, Alfio Dario Grasso, Gaetano Palumbo. 1-5 [doi]
• Pose Aware RGBD-based Face Recognition System With Hierarchical Bilinear PoolingShu-Yun Wu, Ching-Te Chiu, Yung-Ching Hsu. 1-5 [doi]
• Nano-Magnetic Logic based Architecture for Edge Inference using Tsetlin MachineC. Kishore, Santhosh Sivasubramani, Rishad A. Shafik, Amit Acharyya. 1-5 [doi]
• A 2 GHz bandwidth, 6-bit inverter-based open-loop amplifier for high-speed ADCsPål Gunnar Hogganvik, Dag T. Wisland. 1-5 [doi]
• An Inaccuracy Thermal Sensor with a New Digital Calibration Algorithm in 12nm CMOSJun-Wan Wu, Yu-Sin Chang, Ding-Hao Wang, Po-Hung Chen. 1-4 [doi]
• Low Temperature and Dry Fingerprint Restoration with Ridge Loss and OrientationHsueh-Kai Kuo, Ching-Te Chiu, Lien-Chieh Huang. 1-5 [doi]
• Modeling and Simulation of Heterojunction Solar Cell; Determination of Optimal ValuesSani Mohammed Lawal, Nazila Fough, Nazmi Sellami, Firdaus Muhammad-Sukki. 1-2 [doi]
• A sub-mW Ultra-Low Power Low-Voltage LED Driver for a Patch Pulse OximetryMahziar Serri Mazandarani, Gabriel Gagnon-Turcotte, Mohamad Sawan, Benoit Gosselin. 1-4 [doi]
• New design of an ultra low power CDR architecture using FDSOI 28 nm technologyYuqing Mao, Yoann Charlon, Yves Leduc, Gilles Jacquemod. 1-5 [doi]
• One-Transistor-Multiple-RRAM Cells for Energy-Efficient In-Memory ComputingMax Uhlmann, Emilio Pérez-Bosch Quesada, Markus Fritscher, Eduardo Pérez, Markus Andreas Schubert, Marc Reichenbach, Philip Ostrovskyy, Christian Wenger, Gerhard Kahmen. 1-5 [doi]
• A Zoom Architecture Using Linear-Exponential Incremental ADCQingxun Wang, Kaiquan Chen, Liang Qi. 1-5 [doi]
• A compensation scheme for three-stage OTAs with no Miller capacitorsUrvashi Bansal, Alfio Dario Grasso. 1-4 [doi]
• Extending Wireless Power Transfer Range for Self-Powered Micro Devices with mm-size AntennaNatachai Terawatsakul, Alireza Saberkari, Atila Alvandpour. 1-5 [doi]
• PSIJ Transfer Function Response Prediction via NARNET and KBNNsAhsan Javaid, Ramachandra Achar. 1-3 [doi]
• Verification of In-Memory Logic Design using ReRAM CrossbarsKamalika Datta, Arighna Deb, Fatemeh Shirinzadeh, Abhoy Kole, Saeideh Shirinzadeh, Rolf Drechsler. 1-5 [doi]
• A Fully Integrated SCC DC-DC Converter with Novel FMC Controller for Fast Transient ResponseSahil Dalvi, Pilli Kalyan Kumar, Olive Ray, Nijwm Wary. 1-5 [doi]
• Enhancing Real-world Inverted Pendulum Stabilization: Addressing External Perturbations with Feedback and Model Predictive ControlThalita E. Nazaré, Josefredo Gadelha, Erivelton Geraldo Nepomuceno. 1-2 [doi]
• UPF-Aware CDC Structural Verification on RTLDiana Kalel, Jean-Christophe Brignone, Irene Serre, Julian Massicot, Jerome Avezou. 1-2 [doi]
• A 5-DC-parameter MOSFET model for circuit simulation in QucsStudio and SPECTREDeni Germano Alves Neto, Cristina Missel Adotnes, Gabriel Maranhão, Mohamed Khalil Bouchoucha, Manuel J. Barragán, Andreia Cathelin, Márcio Cherem Schneider, Sylvain Bourdel, Carlos Galup-Montoro. 1-5 [doi]
• High-Resolution Fractional Digital Frequency Divider using a Binary-Rate MultiplierDenis Flores, Dominique Dallet, Andrei Vladimirescu, Andreia Cathelin, Yann Deval. 1-5 [doi]
• A CDAC Mismatch Calibration Technique for SAR-assisted Pipeline ADCsZheyi Li, Laurent Berti, Geert Thys, Paul Leroux. 1-5 [doi]
• A Method to Reduce the Design Complexity of Nanophotonic InterconnectsShayan Zohrei, Bayan Alsalem, Sébastien Le Beux. 1-5 [doi]
• Training Low-Latency Spiking Neural Network with Orthogonal Spiking NeuronsYunpeng Yao, Man Wu, Renyuan Zhang. 1-5 [doi]
• Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined LogicElmira Moussavi, Animesh Singh, Dominik Sisejkovic, Aravind Padma Kumar, Daniyar Kizatov, Sven Ingebrandt, Rainer Leupers, Vivek Pachauri, Farhad Merchant. 1-5 [doi]
• Evaluation of Secure Circuit Styles Using Unipolar Logic GatesJelle Biesmans, Kris Myny, Nele Mentens. 1-5 [doi]
• A 3.3V Saturation-Aware Neurostimulator with Reset Functionality in 22 nm FDSOIFranz Marcus Schüffny, Stefan Hänzsche, Stephan Henker, Seyed Mohammad Ali Zeinolabedin, Stefan Scholze, Sebastian Höppner, Richard Miru George, Christian Mayr 0001. 1-5 [doi]
• Low-Power Event-Driven Spectrogram Extractor for Multiple Keyword Spotting: A proof of conceptSoufiane Mourrane, Benoit Larras, Sylvain Clerc, Andreia Cathelin, Antoine Frappé. 1-5 [doi]
• Next-Generation Battery Management System Design MethodologyRashi Dutt, Souris Sahu, Arghadeep Sarkar, Amit Acharyya. 1-2 [doi]
• A 40 nA, 84% Efficient, PLL-based Rectifier-Less Power Switching Converter for Low-Voltage Piezoelectric Energy HarvestingRaghav Bansal, Shouri Chatterjee. 1-5 [doi]
• A 12 GS/s RF-Sampler Employing Inductive Peaking with >57 dB |THD| and >49.3 dB SNDR in 22 nm FD-SOI CMOSEnne Wittenhagen, Patrick Kurth, Urs Hecht, Frowin Buballa, Sebastian Linnhoff, Nima Lotfi, Friedel Gerfers. 1-4 [doi]
• Extremely Random Forest based Automatic Tonic-Clonic Seizure Detection using Spectral Analysis on Electroencephalography DataCraig Stewart, Wai-keung Fung, Nazila Fough, Radhakrishna Prabhu. 1-2 [doi]
• CMOS Temperature Sensor Utilizing Gate-length-based Threshold Voltage ModulationMahfuzul Islam 0001, Shogo Harada, Takashi Hisakado, Osami Wada. 1-5 [doi]
• A Low Noise High Speed Dynamic Comparator Insensitive to PVT and Common-mode InputYaning Wang, Yihang Cheng, Yongli Chen, Fule Li, Chun Zhang, Zhihua Wang. 1-5 [doi]
• CMOS Continuous-Time Integrator with Capacitance MultiplierHiroki Sato, Shigetaka Takagi. 1-5 [doi]
• A Fast Approach to Droplet Routing with Shape-Dependent Velocity on MEDA BiochipsKaito Mori, Chiharu Shiro, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama, Shigeru Yamashita. 1-5 [doi]
• Pixelated RF: Random Metasurface Based Electromagnetic FiltersJungmin Lee, Wei Jia, Berardi Sensale-Rodriguez, Jeffrey S. Walling. 1-5 [doi]
• Inductive relaxation oscillator with current-limitingHervé Barthélemy, Florent Barthélemy, Rémy Vauché, Sylvain Bourdel. 1-4 [doi]
• Improving Hardware Efficiency of a Sparse Training Accelerator by Restructuring a Reduction NetworkBanseok Shin, SeHun Park, Jaeha Kung. 1-5 [doi]
• Triple Clock Boosted Voltage Multiplier: A Design Strategy to Heavily Reduce Rise TimeAndrea Ballo, Alfio Dario Grasso, Gaetano Palumbo. 1-5 [doi]
• PWM Controlled 180° Analog Phase ShifterSushmita Ghosh, Shouri Chatterjee, Swades De, Ajay K. Poddar, Ulrich L. Rohde. 1-4 [doi]
• Design of a Current Sense Amplifier with Dynamic Reference for Reliable Resistive MemoryByung-Kwon An, Xueyong Zhang, Anh-Tuan Do, Tony Tae-Hyoung Kim. 1-5 [doi]
• Substrate noise mitigation using high resistivity base silicon wafer for a 14 GHz VCO on 28 nm FD-SOIYoussef Bendou, Martin Rack, Dimitri Lederer, Andreia Cathelin, Jean-Pierre Raskin. 1-5 [doi]
• A Novel Push-Pull Input Buffer for Wideband ADCs with Improved High-Frequency LinearityLorenzo Scaletti, Luca Bertulessi, Andrea Cristofoli, Andrea Bonfanti. 1-5 [doi]
• Time-Interpolated Vernier Digital-to-Time Converter with Applications in Time-Mode SAR TDCDaniel Junehee Lee, Fei Yuan, Yushi Zhou. 1-4 [doi]
• A Dual-Output Picowatt Hybrid Voltage Reference with Digital Trimming TechniqueYilun Jin, Yuhang Zhang, Zhiwen Gu, Jian Zhao, Zhihong Luo, Yanhan Zeng, Yongfu Li 0002. 1-5 [doi]
• 3D Printed Graphite Based Flexible Thermoplastic Polyurethane Electromyography ElectrodeJonathan Lévesque, Félix Chamberland, Benoit Gosselin. 1-5 [doi]
• Frequency and noise characterization for baseband signal processing on neuromorphic circuitsMelvin Galicia, Leon Happek, Magnus Balzer, Rainer Leupers. 1-5 [doi]
• A High Dynamic-Range Readout Circuit with Differential Resistance-to-Time Conversion for Gas SensorTzung-Je Lee, Meng-Lin Tsai. 1-4 [doi]
• A Neural Recording System with 16 Reconfigurable Front-end Channels and Memristive Processing/Memory UnitXiongfei Jiang, Caterina Sbandati, Grahame Reynolds, Chaohan Wang, Christos Papavassiliou, Alexander Serb, Themis Prodromakis, Shiwei Wang. 1-5 [doi]
• Linearized Analysis of Mid-Rise TDCs for Integer-N and Fractional-N Digital PLLsXu Wang, Michael Peter Kennedy. 1-5 [doi]
• Error Analysis for Fused Floating-point Square-root and Division based on Goldschmidt AlgorithmLiangtao Dai, Binzhe Yuan, Yuan Wang, Chao Yang, Xin Lou. 1-5 [doi]
• Fiber-Bragg-Grating Coupled Magnetostrictive Sensors for Magnetic Tracking of Biomedical ImplantsMahdieh Shojaei Baghini, Kristiaan Broekens, Michiel P. Oderwald, Paul Breedveld, Hadi Heidari, Maurits F. J. Van der Heide. 1-4 [doi]
• A Parallel-Path Amplifier for Fast Output SettlingJavad Bagheri Asli, Alireza Saberkari, Atila Alvandpour. 1-4 [doi]
• Correcting ADC jitter using DPLL timing error signalHaoyang Shen, Hao Zheng, Daniel O'Hare, Deepu John, Barry Cardiff. 1-5 [doi]
• Bitwise ELD Compensation under Integrator Nonidealities in ΔΣ ModulatorsMichael Pietzko, Julian Spiess, Jonathan Ungethüm, John G. Kauffman, Qiang Li, Maurits Ortmanns. 1-5 [doi]
• 100GBit/s RF sample offload for RFSoC using GNU Radio and PYNQMarius Siauciulis, David Northcote, Josh Goldsmith, Louise H. Crockett, Sarunas Kalade. 1-5 [doi]
• Energy-efficient and High Speed Active Cell Balancing Methodology for Lithium-ion Battery PackArghadeep Sarkar, Rashi Dutt, Souris Sahu, Amit Acharyya. 1-5 [doi]
• Background Calibration of Time-Interleaved ADCs with Polyphase FiltersHamidreza Mafi, Mohamed Ali, Yvon Savaria, Mohammad Honarparvar, Naim Ben Hamida. 1-5 [doi]
• Design and Implementation of an FFT-Based Neural Network Accelerator Using Rapid Single-Flux-Quantum TechnologyOlivia Chen, Yanzhi Wang, Fei Ke, Nobuyuki Yoshikawa. 1-5 [doi]
• High-Precision Time-to-Digital Conversion for Calibration of Outphasing Radio TransmittersDhanashree Boopathy, Tze Hin Cheung, Andrei Spelman, Agnimesh Ghosh, Vesa Lampu, Lauri Anttila, Kari Stadius, Marko Kosunen, Jussi Ryynänen, Vishnu Unnikrishnan. 1-5 [doi]
• A Feasibility Study on Textile Electrodes for Transcutaneous Electrical Nerve StimulationWei Ju, Aidan McConnell-Trevillion, Sadeque Reza Khan, Kianoush Nazarpour, Srinjoy Mitra. 1-5 [doi]
• Analysis and Design of a 7 Gb/s Rotatable Non-contact Connector with Grid Array Package ApplicationXiming Wang, Atsutake Kosuge, Yasuhiro Hayashi, Kota Shiba, Mototsugu Hamada, Tadahiro Kuroda. 1-4 [doi]
• A 8.34 nW Wake-Up Receiver Achieving -50dBm Sensitivity at 2.4GHzSébastien Guigue, Camille Leroux, Jean-Baptiste Bégueret, Thierry Taris. 1-4 [doi]
• A 16-channel Real-time Adaptive Neural Signal Compression Engine in 22nm FDSOILiyuan Guo, Seyed Mohammad Ali Zeinolabedin, Franz Marcus Schüffny, Annika Weiße, Stefan Scholze, Richard George 0001, Johannes Partzsch, Christian Mayr 0001. 1-5 [doi]
• High-Swing, Power-efficient, Current-Mode Hybrid Circuit Topologies for Simultaneous Bidirectional CommunicationPrema Kumar Govindaswamy, P. Vijay Shankar. 1-5 [doi]
• Assessment of Communication Protocols' Latency in Co-processing Robotic SystemsEduardo Pereira, Lucas Luza, Nicolas Moura, Luciano Ost, Ney Calazans, Fernando Gehm Moraes, Rafael Garibotti. 1-5 [doi]
• A Current-Mode Implementation of A Nearest Neighbor STDP SynapseAkwasi Akwaboah, Ralph Etienne-Cummings. 1-5 [doi]
• Low-Power Single-Slope ADC with a Replica Comparator for Always-on CIS ApplicationsHohyeon Lee, Minkyu Song, Soo Youn Kim. 1-5 [doi]
• Mismatch and Offset-Voltage Compensation Technique for Current Excitation Based Resistive Sensors InterfaceMehreeq Mushtaq, Mohamad Idris Wani, Sadan Saquib Khan, Meraj Ahmad, Laxmeesha Somappa, Maryam Shojaei Baghini, Hadi Heidari, Shahid Malik. 1-5 [doi]
• TinyFL: On-Device Training, Communication and Aggregation on a Microcontroller For Federated LearningLars Wulfert, Christian Wiede, Anton Grabmaier. 1-5 [doi]
• High-Speed all-GaN Gate Driver with reduced power consumptionKatia Samperi, Salvatore Pennisi, Francesco Pulvirenti. 1-5 [doi]
• A 4 GBaud 5 Vpp Class-B Pre-Driver Design for GaN-Based Switching Power Amplifier in 22 nm SOI-CMOS Utilizing LDMOSFrowin Buballa, Sebastian Linnhoff, Enne Wittenhagen, Urs Hecht, Friedel Gerfers. 1-5 [doi]
• Fault Tolerant Processing Unit Using Gamma Distribution Sliding Window For Autonomous Landing Guidance SystemHossam O. Ahmed. 1-2 [doi]
• Efficient Transistor-Level QDI Asynchronous Switch for Neuromorphic SystemsShahzad Haider, Junhao Liang, Song Chen. 1-5 [doi]
• Phase Space Reconstruction Based Methodology For Real Time Impact Assessment of Corrosion On Structural Health of Ship Material Using In-situ Acoustic Emission SensorsPrasannata Bhange, Deepak Kumar Joshi, Amit Acharyya, Sunil Kumar Pandu, Kamal Mankari, Swati Ghosh Acharyya. 1-5 [doi]
• NB-IoT Wideband Power Amplifier and Diode-Based Antenna Switch co-Integration in 130 nm CMOS SOITristan Lecocq, Olivier Mazouffre, Eric Kerhervé, Jean-Marie Pham. 1-5 [doi]
• Accelerating Relational Database Analytical Processing with Bulk-Bitwise Processing-in-MemoryBen Perach, Ronny Ronen, Shahar Kvatinsky. 1-5 [doi]
• A High-Accuracy Hysteretic DC-DC Converter Using A Spread-Spectrum EMI Suppression Technique with Double Gold CodesTsung-Wen Sun, Meng-Ze Li, Tsung-Heng Tsai, Chia-Chan Chang. 1-4 [doi]
• Comparative Study of Linearized Analysis Frameworks for Mid-Rise TDCsXu Wang, Michael Peter Kennedy. 1-5 [doi]
• Retina Stimulator with Channel Dependent Arbitrary Waveforms in 28nm CMOS ProcessRaphael Steinhoff, Steffen Moll, Sebastian Kaltenstadler, Albrecht Rothermel. 1-5 [doi]
• Flexible Analog-to-Feature Converter for Wireless Smart Healthcare SensorsMikhail Manokhin, Paul Chollet, Patricia Desgreys. 1-5 [doi]
• st-Order Error-Feedback Sampling-Rate Reconfigurable Noise-Shaping SAR ADC for Multi-Channel CMOS Front-End ASICs for Space ApplicationsRashid Karim, Marco Grassi, Piero Malcovati. 1-5 [doi]
• Architectural Exploration for Energy-Efficient LMS and NLMS Adaptive Filters VLSI DesignPedro Tauã Lopes Pereira, Guilherme Paim, Eduardo A. C. da Costa, Paulo F. Flores, Sergio Bampi. 1-5 [doi]
• A Computationally Efficient Predistortion and Segment Thresholding for Distributed PA ArraysRahul Mushini, John Dooley. 1-4 [doi]
• A flexible Power Management System-On-Chip for Implantable Brain-Machine-InterfacesStefan Reich, Markus Sporer, Maurits Ortmanns. 1-5 [doi]
• Integrated Beamforming and Resource Allocation in RIS-Assisted mmWave Networks based on Deep Reinforcement LearningDi Chen, Hui Gao 0001, Na Chen 0004, Ruohan Cao. 1-5 [doi]
• Toward 2.5D Structures for Multi-Channel MEMS Acoustic-Based Digital Isolators using Through Silicon OpeningsHamid Sadrimanesh, Yves Blaquière, Frederic Nabki. 1-5 [doi]
• A 433MHz Multi-Mode Wake-Up Receiver Achieving High Sensitivity via Balun LNA and Injection Locked OscillatorPin-Chen Yeh, Shih-En Chen, Kuang-Wei Cheng. 1-4 [doi]
• A Low-Noise CMOS Front-End with 534 MΩ Transimpedance Gain for Single-Molecule Signal AcquisitionChenyu Ma, Shanci Hu, Yuhang Hu, Tao Deng, Yuliang Han, Yi Li, Yuan Gao. 1-5 [doi]
• A Reservoir Computer-Based Modeling of Hunting Dynamics in Predator-Prey ScenariosSebastian Jenderny, Karlheinz Ochs, Kamel Naoum Naame. 1-5 [doi]
• Finite State Automata Design using 1T1R ReRAM CrossbarSimranjeet Singh, Omar Ghazal, Chandan Kumar Jha 0001, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin B. Patkar, Farhad Merchant. 1-5 [doi]
• Exploring Security Threats by Hardware-Faults in Approximate Arithmetic ComputingMorgana Macedo Azevedo da Rosa, Eduardo A. C. da Costa, Rafael Iankowski Soares, Sergio Bampi. 1-5 [doi]
• A Wide Input Common-mode Range Pipelined ADC Front-end with Common-mode RefreshingJunjie Jing, Yang Ding, Lingxiao Shen, Peng Wang, Fule Li. 1-5 [doi]
• Battery-free Bluetooth Low Energy Wireless Sensor Powered by Radiative Wireless Power TransferAlassane Sidibe, Gaël Loubet, Alexandru Takacs, Lamoussa Sanogo, Daniela Dragomirescu. 1-4 [doi]