Yuriy Sheynin, Elena Suvorova, Felix Shutenko. Complexity and Low Power Issues for On-chip Interconnections in MPSoC System Level Design. In 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany. pages 283-288, IEEE Computer Society, 2006. [doi]
@inproceedings{SheyninSS06,
title = {Complexity and Low Power Issues for On-chip Interconnections in MPSoC System Level Design},
author = {Yuriy Sheynin and Elena Suvorova and Felix Shutenko},
year = {2006},
doi = {10.1109/ISVLSI.2006.30},
url = {http://doi.ieeecomputersociety.org/10.1109/ISVLSI.2006.30},
tags = {design complexity, design},
researchr = {https://researchr.org/publication/SheyninSS06},
cites = {0},
citedby = {0},
pages = {283-288},
booktitle = {2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2-3 March 2006, Karlsruhe, Germany},
publisher = {IEEE Computer Society},
isbn = {0-7695-2533-4},
}