16.6 An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter

Hajime Shibata, Gerry Taylor, Bob Schell, Victor Kozlov, Sharvil Patil, Donald Paterson, Asha Ganesan, Yunzhi Dong, Wenhua Yang, Yue Yin, Zhao Li, Prawal Shrestha, Athreya Gopal, Aathreya Bhat, Shanthi Pavan. 16.6 An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter. In 2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020. pages 260-262, IEEE, 2020. [doi]

@inproceedings{ShibataTSKPPGDY20,
  title = {16.6 An 800MHz-BW VCO-Based Continuous-Time Pipelined ADC with Inherent Anti-Aliasing and On-Chip Digital Reconstruction Filter},
  author = {Hajime Shibata and Gerry Taylor and Bob Schell and Victor Kozlov and Sharvil Patil and Donald Paterson and Asha Ganesan and Yunzhi Dong and Wenhua Yang and Yue Yin and Zhao Li and Prawal Shrestha and Athreya Gopal and Aathreya Bhat and Shanthi Pavan},
  year = {2020},
  doi = {10.1109/ISSCC19947.2020.9062917},
  url = {https://doi.org/10.1109/ISSCC19947.2020.9062917},
  researchr = {https://researchr.org/publication/ShibataTSKPPGDY20},
  cites = {0},
  citedby = {0},
  pages = {260-262},
  booktitle = {2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020},
  publisher = {IEEE},
  isbn = {978-1-7281-3205-1},
}