Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model

Yu-Ju Shih, Chih-Tsun Huang, Jing-Jia Liou, Jyu-Yuan Lai, Chih-Wea Wang, Chi-Feng Wu. Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model. In 2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017. pages 1-4, IEEE, 2017. [doi]

@inproceedings{ShihHLLWW17,
  title = {Optimization for application-specific packet-based on-chip interconnects using a cycle-accurate model},
  author = {Yu-Ju Shih and Chih-Tsun Huang and Jing-Jia Liou and Jyu-Yuan Lai and Chih-Wea Wang and Chi-Feng Wu},
  year = {2017},
  doi = {10.1109/VLSI-DAT.2017.7939676},
  url = {https://doi.org/10.1109/VLSI-DAT.2017.7939676},
  researchr = {https://researchr.org/publication/ShihHLLWW17},
  cites = {0},
  citedby = {0},
  pages = {1-4},
  booktitle = {2017 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2017, Hsinchu, Taiwan, April 24-27, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-3969-2},
}