A traffic-aware memory-cube network using bypassing

Yoshiya Shikama, Ryuta Kawano, Hiroki Matsutani, Hideharu Amano, Yusuke Nagasaka, Naoto Fukumoto, Michihiro Koibuchi. A traffic-aware memory-cube network using bypassing. Microprocessors and Microsystems, 90:104471, April 2022. [doi]

Authors

Yoshiya Shikama

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Ryuta Kawano

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Hiroki Matsutani

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Hideharu Amano

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Yusuke Nagasaka

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Naoto Fukumoto

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Michihiro Koibuchi

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