Takayoshi Shimazu, Shin ichi Wakabayashi, Shinobu Nagayama. A Parallel Multistage Metaheuristic Algorithm for VLSI Floorplanning. In Hamid R. Arabnia, editor, Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 2007, Las Vegas, Nevada, USA, June 25-28, 2007, Volume 2. pages 801-807, CSREA Press, 2007.
Abstract is missing.