Kazunori Shimizu, Nozomu Togawa, Takeshi Ikenaga, Satoshi Goto. Memory-Efficient Accelerating Schedule for LDPC Decoder. In IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006. pages 1317-1320, IEEE, 2006. [doi]
Abstract is missing.