Takashi Shimizu, Yasumoto Tomita, Hidetoshi Matsumura, Masahiko Sugimura, Hironobu Yamasaki, David Thach, Takashi Miyoshi, Takayuki Baba, Yasuhiro Watanabe, Atsushi Ike. An FPGA-accelerated partial image matching engine for massive media data searching systems. In 2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016. pages 1-2, IEEE, 2016. [doi]
@inproceedings{ShimizuTMSYTMBW16,
title = {An FPGA-accelerated partial image matching engine for massive media data searching systems},
author = {Takashi Shimizu and Yasumoto Tomita and Hidetoshi Matsumura and Masahiko Sugimura and Hironobu Yamasaki and David Thach and Takashi Miyoshi and Takayuki Baba and Yasuhiro Watanabe and Atsushi Ike},
year = {2016},
doi = {10.1109/VLSIC.2016.7573489},
url = {http://dx.doi.org/10.1109/VLSIC.2016.7573489},
researchr = {https://researchr.org/publication/ShimizuTMSYTMBW16},
cites = {0},
citedby = {0},
pages = {1-2},
booktitle = {2016 IEEE Symposium on VLSI Circuits, VLSIC 2016, Honolulu, HI, USA, June 15-17, 2016},
publisher = {IEEE},
isbn = {978-1-5090-0635-9},
}