Incremental logic synthesis through gate logic structure identification

T. Shinsha, T. Kubo, Y. Sakataya, J. Koshishita, K. Ishihara. Incremental logic synthesis through gate logic structure identification. In DAC. pages 391-397, 1986. [doi]

Authors

T. Shinsha

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T. Kubo

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Y. Sakataya

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J. Koshishita

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K. Ishihara

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