An energy-efficient on-chip memory structure for variability-aware near-threshold operation

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera. An energy-efficient on-chip memory structure for variability-aware near-threshold operation. In Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015. pages 23-28, IEEE, 2015. [doi]

@inproceedings{ShiomiIO15-0,
  title = {An energy-efficient on-chip memory structure for variability-aware near-threshold operation},
  author = {Jun Shiomi and Tohru Ishihara and Hidetoshi Onodera},
  year = {2015},
  doi = {10.1109/ISQED.2015.7085372},
  url = {http://dx.doi.org/10.1109/ISQED.2015.7085372},
  researchr = {https://researchr.org/publication/ShiomiIO15-0},
  cites = {0},
  citedby = {0},
  pages = {23-28},
  booktitle = {Sixteenth International Symposium on Quality Electronic Design, ISQED 2015, Santa Clara, CA, USA, March 2-4, 2015},
  publisher = {IEEE},
  isbn = {978-1-4799-7581-5},
}