Area-efficient fully digital memory using minimum height standard cells for near-threshold voltage computing

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera. Area-efficient fully digital memory using minimum height standard cells for near-threshold voltage computing. Integration, 65:201-210, 2019. [doi]

@article{ShiomiIO19,
  title = {Area-efficient fully digital memory using minimum height standard cells for near-threshold voltage computing},
  author = {Jun Shiomi and Tohru Ishihara and Hidetoshi Onodera},
  year = {2019},
  doi = {10.1016/j.vlsi.2017.07.001},
  url = {https://doi.org/10.1016/j.vlsi.2017.07.001},
  researchr = {https://researchr.org/publication/ShiomiIO19},
  cites = {0},
  citedby = {0},
  journal = {Integration},
  volume = {65},
  pages = {201-210},
}