An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs

Yuzuru Shizuku, Tetsuya Hirose, Nobutaka Kuroki, Masahiro Numa, Mitsuji Okada. An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs. IEICE Transactions, 98-A(12):2600-2606, 2015. [doi]

Abstract

Abstract is missing.