Yasuro Shobatake, Masahiko Motoyama, Emiko Shobatake, Takashi Kamitake, Shoichi Shimizu, Makoto Noda, Kenji Sakaue. A One-Chip Scalable 8 * 8 ATM Switch LSI Employing Shared Buffer Architecture. IEEE Journal on Selected Areas in Communications, 9(8):1248-1254, 1991.
@article{ShobatakeMSKSNS91,
title = {A One-Chip Scalable 8 * 8 ATM Switch LSI Employing Shared Buffer Architecture},
author = {Yasuro Shobatake and Masahiko Motoyama and Emiko Shobatake and Takashi Kamitake and Shoichi Shimizu and Makoto Noda and Kenji Sakaue},
year = {1991},
tags = {architecture},
researchr = {https://researchr.org/publication/ShobatakeMSKSNS91},
cites = {0},
citedby = {0},
journal = {IEEE Journal on Selected Areas in Communications},
volume = {9},
number = {8},
pages = {1248-1254},
}