High-Speed Arithmetic Coder/Decoder Architectures - researchr publication bibtex

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Gireesh Shrimali, Keshab K. Parhi. High-Speed Arithmetic Coder/Decoder Architectures. In PPSC. pages 1025-1032, 1993.

@inproceedings{ShrimaliP93,
  title = {High-Speed Arithmetic Coder/Decoder Architectures},
  author = {Gireesh Shrimali and Keshab K. Parhi},
  year = {1993},
  tags = {architecture},
  researchr = {https://researchr.org/publication/ShrimaliP93},
  cites = {0},
  citedby = {0},
  pages = {1025-1032},
  booktitle = {PPSC},
}

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