Design Partitioning for Reducing Crosstalk Analysis Time

S. Shrivastava, H. Parameswaran, R. Pratap. Design Partitioning for Reducing Crosstalk Analysis Time. In IEEE Asia Pacific Conference on Circuits and Systems 2006, APCCAS 2006, Singapore, 4-7 December 2006. pages 796-800, IEEE, 2006. [doi]

Abstract

Abstract is missing.