Yun-Shiang Shu. A 6b 3GS/s 11mW fully dynamic flash ADC in 40nm CMOS with reduced number of comparators. In Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012. pages 26-27, IEEE, 2012. [doi]
@inproceedings{Shu12,
title = {A 6b 3GS/s 11mW fully dynamic flash ADC in 40nm CMOS with reduced number of comparators},
author = {Yun-Shiang Shu},
year = {2012},
doi = {10.1109/VLSIC.2012.6243772},
url = {http://dx.doi.org/10.1109/VLSIC.2012.6243772},
researchr = {https://researchr.org/publication/Shu12},
cites = {0},
citedby = {0},
pages = {26-27},
booktitle = {Symposium on VLSI Circuits, VLSIC 2012, Honolulu, HI, USA, June 13-15, 2012},
publisher = {IEEE},
isbn = {978-1-4673-0848-9},
}