Xin Si, Yung-Ning Tu, Wei-Hsing Huang, Jian-Wei Su, Pei-Jung Lu, Jing-Hong Wang, Ta-Wei Liu, Ssu-Yen Wu, Ruhui Liu, Yen-Chi Chou, Zhixiao Zhang, Syuan-Hao Sie, Wei-Chen Wei, Yun-Chen Lo, Tai-Hsing Wen, Tzu-Hsiang Hsu, Yen-Kai Chen, William Shih, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Nan-Chun Lien, Wei-Chiang Shih, Yajuan He, Qiang Li, Meng-Fan Chang. 15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips. In 2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020. pages 246-248, IEEE, 2020. [doi]
@inproceedings{SiTHSLWLWLCZSWL20,
title = {15.5 A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8b MAC Operation for AI Edge Chips},
author = {Xin Si and Yung-Ning Tu and Wei-Hsing Huang and Jian-Wei Su and Pei-Jung Lu and Jing-Hong Wang and Ta-Wei Liu and Ssu-Yen Wu and Ruhui Liu and Yen-Chi Chou and Zhixiao Zhang and Syuan-Hao Sie and Wei-Chen Wei and Yun-Chen Lo and Tai-Hsing Wen and Tzu-Hsiang Hsu and Yen-Kai Chen and William Shih and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh and Kea-Tiong Tang and Nan-Chun Lien and Wei-Chiang Shih and Yajuan He and Qiang Li and Meng-Fan Chang},
year = {2020},
doi = {10.1109/ISSCC19947.2020.9062995},
url = {https://doi.org/10.1109/ISSCC19947.2020.9062995},
researchr = {https://researchr.org/publication/SiTHSLWLWLCZSWL20},
cites = {0},
citedby = {0},
pages = {246-248},
booktitle = {2020 IEEE International Solid- State Circuits Conference, ISSCC 2020, San Francisco, CA, USA, February 16-20, 2020},
publisher = {IEEE},
isbn = {978-1-7281-3205-1},
}