Automatic Generation of Verified Concurrent Hardware Using VHDL

Luciano Silva, Marcel Oliveira. Automatic Generation of Verified Concurrent Hardware Using VHDL. In Lucas Lima 0001, Vince Molnár, editors, Formal Methods: Foundations and Applications - 25th Brazilian Symposium, SBMF 2022, Virtual Event, December 6-9, 2022, Proceedings. Volume 13768 of Lecture Notes in Computer Science, pages 55-72, Springer, 2022. [doi]

Abstract

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