A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power and Endurance

William Andrew Simon, Alexandre Levisse, Marina Zapater, David Atienza. A Hybrid Cache HW/SW Stack for Optimizing Neural Network Runtime, Power and Endurance. In 28th IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SOC 2020, Salt Lake City, UT, USA, October 5-7, 2020. pages 94-99, IEEE, 2020. [doi]

Authors

William Andrew Simon

This author has not been identified. Look up 'William Andrew Simon' in Google

Alexandre Levisse

This author has not been identified. Look up 'Alexandre Levisse' in Google

Marina Zapater

This author has not been identified. Look up 'Marina Zapater' in Google

David Atienza

This author has not been identified. Look up 'David Atienza' in Google