Instruction-Based Self-Testing of Delay Faults in Pipelined Processors

Virendra Singh, Michiko Inoue, Kewal K. Saluja, Hideo Fujiwara. Instruction-Based Self-Testing of Delay Faults in Pipelined Processors. IEEE Trans. VLSI Syst., 14(11):1203-1215, 2006. [doi]

@article{SinghISF06,
  title = {Instruction-Based Self-Testing of Delay Faults in Pipelined Processors},
  author = {Virendra Singh and Michiko Inoue and Kewal K. Saluja and Hideo Fujiwara},
  year = {2006},
  doi = {10.1109/TVLSI.2006.886412},
  url = {http://dx.doi.org/10.1109/TVLSI.2006.886412},
  tags = {rule-based, testing},
  researchr = {https://researchr.org/publication/SinghISF06},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. VLSI Syst.},
  volume = {14},
  number = {11},
  pages = {1203-1215},
}