A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET

Dheeraj Kumar Sinha, Amitabh Chatterjee, Vishnuram Abhinav, Gaurav Trivedi, Victor Koldyaev. A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET. In 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, VLSID 2016, Kolkata, India, January 4-8, 2016. pages 312-317, IEEE Computer Society, 2016. [doi]

Authors

Dheeraj Kumar Sinha

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Amitabh Chatterjee

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Vishnuram Abhinav

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Gaurav Trivedi

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Victor Koldyaev

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