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An O(log n) Parallel Algorithm for Binary Multiplication and its VLSI implementation

Bhabani P. Sinha, Pradip K. Srimani. An O(log n) Parallel Algorithm for Binary Multiplication and its VLSI implementation. In Proceedings of the 8th IEEE Real-Time Systems Symposium (RTSS 87), December 1-3, 1987, San Jose, Califorinia, USA. pages 54-62, IEEE Computer Society, 1987.

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Bhabani P. Sinha

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Pradip K. Srimani

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